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MX23L6411
64M-BIT (8M x 8 / 4M x 16) Mask ROM with Page Mode
FEATURES
* Bit organization - 8M x 8 (byte mode) - 4M x 16 (word mode) * Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) * Page Size - 8 words per page * Current - Operating: 50mA - Standby: 15uA (max.) * Supply voltage - 2.7V~3.3V * Package - 44 pin SOP (500 mil) - 48 pin TSOP (12mm x 20mm)
ORDER INFORMATION
Part No. Access Page Access Package Time MX23L6411MC-12 120ns MX23L6411TC-12 120ns MX23L6411RC-12 120ns MX23L6411MC-10 100ns MX23L6411TC-10 100ns MX23L6411RC-10 100ns Time 50ns 50ns 50ns 30ns 30ns 30ns 44 pin SOP 48 pin TSOP 48 pin TSOP (Reverse type) 44 pin SOP 48 pin TSOP 48 pin TSOP (Reverse type)
PIN DESCRIPTION PIN CONFIGURATION
44 SOP
A21 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC
Symbol A0~A21 D0~D14 D15/A-1 CE OE Byte VCC VSS NC
MX23L6411
Pin Function Address Inputs Data Outputs D15 (Word Mode) / LSB Address (Byte Mode) Chip Enable Input Output Enable Input Word / Byte Mode Selection Power Supply Pin Ground Pin No Connection
MODE SELECTION
CE OE Byte D15/A-1 D0~D7 D8~D15 Mode H L L L X H L L X X H L X X Input High Z High Z D0~D7 High Z High Z High Z Byte Power Stand-by Active Active Active
Output D0~D7 D8~D15 Word
P/N:PM0407
REV. 2.7, AUG. 03, 2001
1
MX23L6411
48 TSOP (NORMAL TYPE)
BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS
MX23L6411
48 TSOP (REVERSE TYPE)
VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE
MX23L6411
P/N:PM0407
REV. 2.7, AUG. 03, 2001
2
MX23L6411
BLOCK DIAGRAM
A0/(A-1) A2 A3 A21 CE BYTE OE Address Buffer Memory Array Page Buffer Page Decoder Word/ Byte Output Buffer D0 D15/(D7)
ABSOLUTE MAXIMUM RATINGS
Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -1.3V to 2.0V 0 to 70 C C -65 to 125 C C
Note: Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -1.3V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions, input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
P/N:PM0407
REV. 2.7, AUG. 03, 2001
3
MX23L6411
DC CHARACTERISTICS (Ta = 0 ~ 70C, VCC = 2.7V~3.3V) C
Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance Symbol VOH VOL VIH VIL ILI ILO ICC1 ISTB1 ISTB2 CIN COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.8V 5uA 5uA 50mA 1mA 15uA 10pF 10pF Conditions IOH = -0.4mA IOL = 1.6mA
0V, VCC 0V, VCC f=5MHz, all output open CE = VIH CE>VCC-0.2V Ta = 25 f = 1MHZ C, Ta = 25 f = 1MHZ C,
AC CHARACTERISTICS (Ta = 0 ~ 70 VCC = 2.7V~3.3V) C C,
Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay Symbol tRC tAA tACE tPA tOE tOH tHZ 23L6411-10 MIN. 100ns 0ns MAX. 100ns 100ns 30ns 30ns 20ns 23L6411-12 MIN. 120ns 0ns MAX. 120ns 120ns 50ns 50ns 20ns
Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested.
P/N:PM0407
REV. 2.7, AUG. 03, 2001
4
MX23L6411
AC Test Conditions
Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.4V 1.4V See Figure
IOH (load)=-0.4mA DOUT IOL (load)=1.6mA
C<100pF
Note:No output loading is present in tester load board. Active loading is used and under software programming control.
TIMING DIAGRAM
RANDOM READ
ADD
Output loading capacitance includes load board's and all stray capacitance.
ADD
tACE
ADD
tRC
ADD
CE#
tOE
OE#
tAA tOH tHZ
DATA
VALID
VALID
VALID
PAGE READ
A3-A21
VALID ADD
(A-1),A0,A1,A2
1'st ADD tAA
2'nd ADD tPA VALID VALID
3'rd ADD
DATA
VALID
Note: CE, OE are enable. Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
P/N:PM0407
REV. 2.7, AUG. 03, 2001
5
MX23L6411
PACKAGE INFORMATION
44-PIN PLASTIC SOP
P/N:PM0407
REV. 2.7, AUG. 03, 2001
6
MX23L6411
48-PIN PLASTIC TSOP
P/N:PM0407
REV. 2.7, AUG. 03, 2001
7
MX23L6411
REVISION HISTORY
REVISION 2.1 2.2 2.3 2.4 2.5 2.6 2.7 DESCRIPTION AC CHARACTERISTICS tOH 10ns-->0ns DC CHARACTERISTICS ISTB2 5uA-->15uA DC Characteristics voltage range VCC=2.9V~3.6V-->3.0V~3.6V Add 100ns speed grade Modify Operating Current:60mA-->50mA Modify Package Information Change VCC from 3.0~3.6V to 2.7~3.3V PAGE P4 P4 P3 P1,4 P1,4 P6,7 P1,3 DATE JAN/29/1999 SEP/03/1999 DEC/24/1999 JUL/02/2000 DEC/29/2000 JUL/17/2001 AUG/03/2001
P/N:PM0407
REV. 2.7, AUG. 03, 2001
8
MX23L6411
MACRONIX INTERNATIONAL CO., LTD.
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http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
9

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